Job brief: Principal DFT Engineer (Silicon Engineering)
SpaceX · Palo Alto, CA · facts as of 2026-11-07. Anyone can open this page; no account needed.
Is it still open? · Checked by JoRoute
Still listed. JoRoute saw it on SpaceX's own job board 5 hours ago; the employer first posted it on 2026-07-30.
What JoRoute checked · Checked by JoRoute
- Listed on SpaceX's own job board. JoRoute does not take listings from job ads or recruiters.
- First seen by JoRoute 2026-11-04 (3 days ago); last confirmed on the board 2026-11-07.
- The apply link opens boards.greenhouse.io, the address SpaceX's board gives for this job.
- No other listing with this title and place on this board in the last 90 days.
- No layoff notices (WARN) under this name in the state files JoRoute reads.
What the listing says · Employer's own words, not checked
- Pay: $220,000 to $355,000 a year
- Job type: Not stated
- Where: Palo Alto, CA · Austin, TX · Irvine, CA
- Posted: 2026-07-30 · over 60 days ago
What the job asks · Employer's own words, not checked
Level: Lead / staff. The title says "Principal".
Must have
- Bachelor’s degree in electrical engineering, computer engineering or computer science
- 10+ years of experience working with ASICs
- 10+ years of experience in scan insertion and DFT setup, integration and validation
- Government export regulations, applicant must be a (i) U.S.
- § 1158, or be eligible to obtain the required authorizations from the U.S.
Conditions
- Ability to work extended hours and weekends as needed to meet critical milestones
- You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year.
- employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/…
Main duties
- Lead implementation and optimization of DFT architectures, including scan insertion, compression/decompression logic, memory BIST, and logic BIST, leveraging…
- Own ATPG tools and methodologies, including generating patterns for stuck-at, transition, and path delay fault models, while focusing on pattern compression,…
- Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools
- Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems
- Run and debug non-timing and SDF annotated gate level simulations
Lines copied from the posting, not rewritten. "Preferred" or "nice to have" items are not listed as must-haves.
How it compares · Compared by JoRoute from listings
- Typical listed pay for engineer jobs in Austin, TX: $174k a year (130 listings, 14 employers). This listing is 65% higher.
- Across SpaceX's 2,896 open listings, 59% of those with a posting date were first posted more than 60 days ago. How SpaceX hires
What nobody outside the employer knows · Not known
- Whether the role is already filled or on hold: employers often leave listings up.
- How many people applied, and who reads the applications.
- Where in the published range an offer would land.
Ask before you apply
- Is this role still open, and when do you hope to fill it?
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- What are the interview steps, and when should I expect to hear back?
Next steps
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A summary of facts and listings, not a verdict that this job or employer is safe. JoRoute is not affiliated with SpaceX. How JoRoute checks listings · Original posting

