Job brief: EDA Engineer (RFIC Engineering)

What JoRoute checked · Checked by JoRoute

• Listed on SpaceX's own job board. JoRoute does not take listings from job ads or recruiters.
• First seen by JoRoute 2026-11-04 (4 days ago); last confirmed on the board 2026-11-07.
• The apply link opens boards.greenhouse.io, the address SpaceX's board gives for this job.
• No other listing with this title and place on this board in the last 90 days.
• No layoff notices (WARN) under this name in the state files JoRoute reads.

What the listing says · Employer's own words, not checked

• Pay: $125,000 to $175,000 a year
• Job type: Not stated
• Where: Irvine, CA · Redmond, WA
• Posted: 2026-07-14 · over 60 days ago

What the job asks · Employer's own words, not checked

Level: Mid level. The posting asks for 2+ years of experience.

Must have

• Triage DRC, LVS, PEX, simulation, EM, license, HPC, and environment issues using reproducible debug practices: command, log path, tool version, PDK version, run directory, expecte…
• Build lightweight automation in Python, Tcl, SKILL, shell, Perl, Makefile, or similar languages for log collection, preflight checks, license/tool health checks, regression report…
• Maintain clear runbooks and Confluence documentation for common EDA flows, including DRC/LVS/PEX debug, Cadence/Virtuoso setup, simulation setup, HPC job submission, license issue…
• Bachelor's degree in electrical engineering, computer engineering, or computer science
• 2+ years of experience in EDA/CAD support, IC design flow development, silicon design, physical verification, verification infrastructure, and/or CAD automation
• Master’s degree in electrical engineering, computer engineering, computer science, or a related technical field; or equivalent practical experience

Conditions

• We are seeking a motivated, hands-on, proactive, and intellectually curious EDA Engineer to help support and improve the IC design environment used by silicon design, layout, veri…
• Support day-to-day EDA/CAD workflows for RFIC and silicon engineering teams, including tool launch, environment setup, PDK usage, simulation, physical verification, extraction, an…
• Partner with design, layout, verification, physical design, IT/HPC, foundry, and EDA vendor teams to resolve blocked flows and improve methodology robustness
• Experience with Siemens Calibre DRC/LVS/PEX/xRC, Synopsys ICV/StarRC, Cadence Pegasus/Quantus, or related physical verification/extraction tools

Main duties

• Support day-to-day EDA/CAD workflows for RFIC and silicon engineering teams, including tool launch, environment setup, PDK usage, simulation, physical verifi…
• Support analog/RF/mixed-signal specific flows (Virtuoso, Spectre, EM tools, etc.) in addition to digital and physical verification flows
• Assist with PDK installation, qualification, version tracking, release notes, and deployment support for supported foundry processes
• Triage DRC, LVS, PEX, simulation, EM, license, HPC, and environment issues using reproducible debug practices: command, log path, tool version, PDK version, …
• Maintain and improve tool launch wrappers, setup scripts, environment modules, path configuration, project templates, and onboarding material

Lines copied from the posting, not rewritten. "Preferred" or "nice to have" items are not listed as must-haves.

How it compares · Compared by JoRoute from listings

• Typical listed pay for engineer jobs in Washington: $153k a year (848 listings, 40 employers). This listing pays about the same.
• Across SpaceX's 2,896 open listings, 60% of those with a posting date were first posted more than 60 days ago. How SpaceX hires

What nobody outside the employer knows · Not known

• Whether the role is already filled or on hold: employers often leave listings up.
• How many people applied, and who reads the applications.
• Where in the published range an offer would land.

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