Job brief: ASIC/SOC DFT Engineer (Silicon Engineering)
SpaceX · Austin, TX · facts as of 2026-11-08. Anyone can open this page; no account needed.
Is it still open? · Checked by JoRoute
Still listed. JoRoute saw it on SpaceX's own job board 2 hours ago; the employer first posted it on 2026-08-06.
What JoRoute checked · Checked by JoRoute
- Listed on SpaceX's own job board. JoRoute does not take listings from job ads or recruiters.
- First seen by JoRoute 2026-11-04 (4 days ago); last confirmed on the board 2026-11-08.
- The apply link opens boards.greenhouse.io, the address SpaceX's board gives for this job.
- No other listing with this title and place on this board in the last 90 days.
- No layoff notices (WARN) under this name in the state files JoRoute reads.
What the listing says · Employer's own words, not checked
- Pay: Not published
- Job type: Not stated
- Where: Austin, TX · Palo Alto, CA
- Posted: 2026-08-06 · over 60 days ago
California requires many employers to include pay in job postings; whether that covers this job depends on the law's rules.
What the job asks · Employer's own words, not checked
Level: Entry level. The posting asks for 1+ years of experience.
Must have
- Bachelor’s degree in electrical engineering, computer engineering or computer science
- 1+ years of professional experience working with ASICs
- Must be willing to work extended hours and weekends as needed
- Government export regulations, applicant must be a (i) U.S.
- § 1158, or be eligible to obtain the required authorizations from the U.S.
Conditions
- Collaborate with circuit physical design team, ATPG team and manufacturing team to facilitate high quality scan coverage in silicon
- Understanding of ASIC design flow, methodologies, physical design, and verification
- employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/…
Main duties
- Responsible for evaluating design readiness for scan insertion through RTL and physical design Scan Design Rule Check (DRC) tools
- Integration and verification of Design for Test (DFT) fabrics and IP within Subsystems
- Running and evaluating scan insertion through synthesis tools and refining scan insertion recipe for maximum coverage
- Run ATPG(Automatic Test Pattern Generation) analysis to ensure quality scan chain construction and meeting basic coverage goals
- Run and debug non-timing and SDF annotated gate level simulations
Lines copied from the posting, not rewritten. "Preferred" or "nice to have" items are not listed as must-haves.
How it compares · Compared by JoRoute from listings
- Typical listed pay for engineer jobs in Austin, TX: $174k a year (131 listings, 14 employers). This listing does not publish pay to compare.
- Across SpaceX's 2,900 open listings, 60% of those with a posting date were first posted more than 60 days ago. How SpaceX hires
What nobody outside the employer knows · Not known
- Whether the role is already filled or on hold: employers often leave listings up.
- How many people applied, and who reads the applications.
- The pay an offer would carry.
Ask before you apply
- What is the pay range for this role? (California requires many employers to post it.)
- Is this role still open, and when do you hope to fill it?
- Which of the listed places is this role based in?
- What are the interview steps, and when should I expect to hear back?
Next steps
Apply on the employer's page Full listingDoes my CV fit?Practise the interviewShould I apply?
Got a message about this job asking for money or documents? Check the message first.
Keep looking
- 212 more engineer jobs within 25 miles, on the job map with pay.
- All 2,900 open SpaceX jobs, and how SpaceX hires.
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A summary of facts and listings, not a verdict that this job or employer is safe. JoRoute is not affiliated with SpaceX. How JoRoute checks listings · Original posting

